In a Computer System using Segmentation > 자유게시판

Memory segmentation is an working system memory management strategy of dividing a computer's primary memory into segments or sections. In a pc system utilizing segmentation, a reference to a memory location includes a value that identifies a phase and an offset (Memory Wave Program location) within that segment. Segments or sections are also utilized in object recordsdata of compiled applications when they are linked collectively right into a program image and when the picture is loaded into memory. Segments could also be created for program modules, or for lessons of memory usage reminiscent of code segments and knowledge segments. Sure segments may be shared between programs. Segmentation was initially invented as a technique by which system software program may isolate software program processes (duties) and information they're using. It was intended to extend reliability of the methods operating a number of processes concurrently. In a system utilizing segmentation, pc memory addresses encompass a phase id and an offset within the phase.

A hardware memory management unit (MMU) is accountable for translating the segment and offset right into a bodily address, and for performing checks to make sure the translation might be completed and that the reference to that section and offset is permitted. Each segment has a size and set of permissions (for example, read, write, execute) associated with it. A course of is barely allowed to make a reference into a segment if the type of reference is allowed by the permissions, and if the offset inside the segment is throughout the vary specified by the length of the segment. In any other case, a hardware exception similar to a segmentation fault is raised. Segments could also be used to implement digital memory. In this case every section has an associated flag indicating whether or not it's current in foremost memory or not. If a section is accessed that's not present in main memory, an exception is raised, and the working system will learn the phase into memory from secondary storage.

Segmentation is one technique of implementing memory protection. Paging is one other, and they can be combined. The size of a memory phase is mostly not mounted and may be as small as a single byte. Segmentation has been implemented a number of ways on various hardware, with or without paging. Intel x86 memory segmentation does not fit either mannequin and Memory Wave Program is discussed separately beneath, and also in better detail in a separate article. Associated with each segment is data that signifies the place the section is situated in memory- the section base. When a program references a memory location, the offset is added to the phase base to generate a physical memory handle. An implementation of virtual memory on a system using segmentation with out paging requires that total segments be swapped again and forth between foremost memory and secondary storage. When a phase is swapped in, the operating system has to allocate enough contiguous free memory to hold the complete phase. Typically memory fragmentation results if there shouldn't be sufficient contiguous memory even though there could also be sufficient in whole.

As a substitute of a memory location, the section information includes the tackle of a page table for the section. When a program references a memory location the offset is translated to a memory handle using the web page table. A segment may be prolonged by allocating another memory web page and adding it to the phase's web page table. An implementation of virtual memory on a system utilizing segmentation with paging usually solely moves individual pages again and forth between important memory and secondary storage, just like a paged non-segmented system. Pages of the segment can be positioned wherever in important memory and want not be contiguous. This normally results in a lowered quantity of input/output between primary and secondary storage and decreased memory fragmentation. The B5000 is equipped with a phase information table called this system Reference Table (PRT) which is used to indicate whether or not the corresponding segment resides in the main memory, to maintain the base deal with and the scale of the phase.

The later B6500 pc additionally applied segmentation; a model of its architecture continues to be in use right this moment on the Unisys ClearPath Libra servers. The GE 645 computer, a modification of the GE-635 with segmentation and paging assist added, was designed in 1964 to help Multics. 1975, attempted to implement a real segmented architecture with memory protection on a microprocessor. The 960MX model of the Intel i960 processors supported load and store instructions with the source or vacation spot being an "access descriptor" for an object, and an offset into the article, with the access descriptor being in a 32-bit register and with the offset computed from a base offset in the next register and from a further offset and, optionally, an index register specified within the instruction. An access descriptor contains permission bits and a 26-bit object index; the object index is an index right into a table of object descriptors, giving an object type, an object size, and a physical tackle for the object's data, a page table for the item, or the top-level web page table for a two-stage web page table for the item, depending on the object kind.